There are two types of biphase codes, the so-called biphase mark code and the so-called biphase space code. In the biphase mark code, logical ones are specially coded, and, in the biphase space code, logical zeros are specially coded. In the biphase mark code, there is always a change of the logical states between the data bits of the data signal, and in the case of a logical one there is also a change in the data-bit middle, whereas there is not in the case of a logical zero. Lines A and B according to FIG. 2 show this relationship. Similar considerations apply to the biphase space code.
For data recovery of such a biphase-coded data signal, the bit clock needs to be recovered on the reception side. To that end, it is known to use a phase-synchronized clock generator (PLL), which is exactly locked to double the bit frequency of the data signal. At substantially high data rates, however, it is difficult to maintain the requisite accurate phase relationship between the clock frequency and the biphase data, which is necessary for reliable data decoding.
There is therefore a need to provide a method with which clock recovery for a biphase-coded data signal is possible even at substantially high data rates.